1
Ulrich Klostermann
Alexander Duch, Ulrich Klostermann, Michael Kund: Electric device protection circuit and method for protecting an electric device. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, July 6, 2010: US07751163 (36 worldwide citation)


An electric device protection circuit comprises at least one conductive bridging unit which electrically connects a terminal of the electric device to a protection node set to a protection potential, the protection potential being chosen such that the conductive bridging unit switches from a resisti ...


2
Ulrich Klostermann
Ulrich Klostermann: Integrated circuits; methods for manufacturing an integrated circuit and memory module. Qimonda, Altis Semiconductor SNC, November 23, 2010: US07838861 (30 worldwide citation)


Embodiments of the present invention relate generally to integrated circuits, to methods for manufacturing an integrated circuit and to a memory module. In an embodiment of the invention, an integrated circuit is provided having a programmable arrangement. The programmable arrangement includes a sub ...


3
Ulrich Klostermann
Rainer Leuschner, Ulrich Klostermann: Integrated circuits; method for manufacturing an integrated circuit; method for decreasing the influence of magnetic fields; memory module. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, April 13, 2010: US07697322 (26 worldwide citation)


Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction i ...


4
Ulrich Klostermann
Ulrich Klostermann, Rainer Leuschner: Integrated circuit, method of manufacturing an integrated circuit, and memory module. Qimonda, Altis Semiconductor SNC, December 21, 2010: US07855435 (11 worldwide citation)


According to one embodiment of the present invention, an integrated circuit including a plurality of memory cells is provided. Each memory cell includes a resistivity changing memory element which includes a top electrode, a bottom electrode, and resistivity changing material being disposed between ...


5
Ulrich Klostermann
Human Park, Ulrich Klostermann, Rainer Leuschner: Condensed memory cell structure using a FinFET. Qimonda, Altis Semiconductor SNC, John S Economou, March 4, 2014: US08665629 (6 worldwide citation)


An integrated circuit and method for manufacturing an integrated circuit are described. In one embodiment, the integrated circuit includes a memory cell that includes a resistivity changing memory element. The resistivity changing memory element is electrically coupled to a select transistor that in ...


6
Ulrich Klostermann
Rok Dittrich, Ulrich Klostermann: Integrated circuit, cell arrangement, method of operating an integrated circuit, memory module. Qimonda, Altis Semiconductor SNC, May 12, 2009: US07532506 (5 worldwide citation)


An integrated circuit having a cell arrangement is provided. The cell arrangement includes at least one magnetoresistive memory cell, a first line providing a first line current, and a second line providing a second line current. The cell arrangement further includes a controller controlling the app ...


7
Ulrich Klostermann
Dietmar Gogl, Rainer Leuschner, Ulrich Klostermann: Integrated circuit, memory cell array, memory module, and method of operating an integrated circuit. Qimonda, ALTIS Semiconductor SNC, March 8, 2011: US07903454 (5 worldwide citation)


According to one embodiment of the present invention, an integrated circuit includes a plurality of thermal selectable memory cells, each memory cell being connected to a conductive line, the conductive line having a first portion for applying a heating current, and a second portion for applying a p ...


8
Ulrich Klostermann
Ulrich Klostermann, Chanro Park, Wolfgang Raberg: Memory having cap structure for magnetoresistive junction and method for structuring the same. Altis Semiconductor SNC, Infineone Technologies, Dicke Billig & Czaja PLLC, October 13, 2009: US07602032 (4 worldwide citation)


A memory and method of making a memory is disclosed. In one embodiment, the memory includes a cap structure for a magnetoresistive random access memory device including an etch stop layer formed over an upper magnetic layer of a magnetoresistive junction (MTJ/MCJ) layered structure and a hardmask la ...


9
Ulrich Klostermann
Ulrich Klostermann: Integrated circuit, memory cell, memory module, method of operating an integrated circuit, and method of manufacturing a memory cell. Qimonda, ALTIS Semiconductor SNC, Slater & Matsil L, April 13, 2010: US07697313 (3 worldwide citation)


According to one embodiment, an integrated circuit includes an arrangement of memory cells. Each memory cell is connected to a programming current path used for programming the memory cell, and a sensing current path used for sensing the memory state of the memory cell. The programming current path ...


10
Ulrich Klostermann
Rainer Leuschner, Ulrich Klostermann, Richard Ferrant: MRAM device structure employing thermally-assisted write operations and thermally-unassisted self-referencing operations. Qimonda, ALTIS Semiconductor SNC, November 13, 2012: US08310866 (2 worldwide citation)


A thermally-assisted MRAM structure which is programmable at a writing mode operating temperature is presented and includes an anti-ferromagnet, an artificial anti-ferromagnet, a barrier layer, and a free magnetic layer. The anti-ferromagnet is composed of a material having a blocking temperature Tb ...



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