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Katsuyuki Musaka
Natsuki Makino, Junji Kunisawa, Keisuke Namiki, Yukio Fukunaga, Katsuyuki Musaka, Ray Fang, Emanuel Israel Cooper, John Michael Cotte, Hariklia Deligianni, Keith T Kwietniak, Brett C Baker O Neal, Matteo Flotta, Philippe Mark Vereecken: Electrolytic processing apparatus and method. Squire Sanders & Dempsey, February 15, 2007: US20070034526-A1


An electrolytic processing apparatus can planarize uniformly over an entire surface of a substrate under a low pressure without any damages to the substrate. The electrolytic processing apparatus has a substrate holder configured to hold and rotate a substrate having a metal film formed on a surface ...


2
Katsuyuki Musaka
Masayuki Kumekawa, Norio Kimura, Yukio Fukunaga, Katsuyuki Musaka, Hariklia Deligianni, Emanuel Israel Cooper, Philippe Mark Vereecken: Electrolytic processing method. Squire Sanders & Dempsey, February 15, 2007: US20070034525-A1


An electrolytic processing method is used to remove a metal film formed on a surface of a substrate. The electrolytic processing method includes providing a feeding electrode 31 and a processing electrode 32 on a table 12, providing an insulating member 36 between the feeding electrode and the proce ...


3
Stefanie Ruth Chiras, Michael Wayne Lane, Sandra Guy Malhotra, Fenton Reed Mc Feely, Robert Rosenberg, Carlos Juan Sambucetti, Philippe Mark Vereecken: Formation of aligned capped metal lines and interconnections in multilevel semiconductor structures. International Business Machines Corporation, Thomas A Beck, Daniel P Morris, November 2, 2010: US07825516 (3 worldwide citation)


In integrated circuit technology; an electromigration and diffusion sensitive conductor of a metal such as copper and processing procedure therefore is provided, wherein, at a planarized chemical mechanical processed interfacing surface, the conductor metal is positioned in a region of a selectable ...


4
Stefanie Ruth Chiras, Michael Wayne Lane, Sandra Guy Malhotra, Fenton Reed Mc Feely, Robert Rosenberg, Carlos Juan Sambucetti, Philippe Mark Vereecken: Formation of aligned capped metal lines and interconnections in multilevel semiconductor structures. Alvin J Riddles, June 17, 2004: US20040113277-A1


In integrated circuit technology; an electromigration and diffusion sensitive conductor of a metal such as copper and processing procedure therefore is provided, wherein, at a planarized chemical mechanical processed interfacing surface, the conductor metal is positioned in a region of a selectable ...


5
Soon Cheon Seo, Wei Tsu Tseng, Darryl D Restaino, James E Fluegel, Richard O Henry, John M Cotte, Mahadevaiyer Krishnan, Hariklia Deligianni, Philippe Mark Vereecken, Stephen E Greco: Method of forming planar Cu interconnects without chemical mechanical polishing. International Business Machines Corporation, International Business Machines Corporation, Dept 18g, May 20, 2004: US20040094511-A1


A method for controlling the shape of copper features, having the following steps: a) plating a copper feature with a predetermined final shape onto a copper seed layer in a plating bath for a first plating time using a first plating method, wherein the first plating time is less than the total leng ...



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